module alu(alu_out, carry , opcode, data, accum,clock);

 

input [15:0] data,accum;

input [7:0] opcode;

input clock;

output [15:0] alu_out;

output carry;

 

reg carry;

reg [16:0] temp;

reg [15:0] alu_out;

 

`define ADC 8'h13

//`define DIV 8'b11110110

`define SBB 8'h1C

`define OR 8'h0B

`define SAL 8'h34

`define SAR 8'h35

 

 

always @(negedge clock) #3.5

 

case (opcode)

 

`ADC : begin

temp = accum+data;

alu_out = temp[15:0];

carry = temp[16];

end

/*`DIV : begin

alu_out[7:0] = accum/data;

alu_out[15:8] = accum%data;

end*/

`OR : alu_out=accum | data;

`SBB : begin

temp = accum-data;

alu_out = temp[15:0];

carry = temp[16];

end

`SAL : alu_out = accum<<1;

`SAR : alu_out = accum>>1;

 

default : begin

$display("\n WARNING FROM ALU: Undefined opcode: %b\n",opcode);

alu_out = 8'bx;

end

 

endcase

 

 

endmodule